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Each flip-flop has provisions for individual J, K, set, reset and clock input signals. The CDBE is useful in performing control, register and toggle functions. Logic levels present at the J and K inputs along with internal self-steering control the state of each flip-flop, changes in the flip-flop state are synchronous with the positive-going transition of the clock pulse.
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Upload bom file batch search. Forward to English site? Yes No. RoHS Compliant. Feedback error. Suppliers 15 results View all component prices. Tax can be calculated when selecting RMB. Enter the quantity to calculate the total price. USA HongKong. USA Holland. More quote from supplies. Frequency Product overview. Set-reset capability. Static flip-flop operation, retains state indefinitely with clock level either high or low. Medium speed operation - 16MHz typical clock toggle rate at 10V.
Standardized, symmetrical output characteristics. Show All. Datasheet PDF. DIP 15V 16Pin. DIP 15V 14Pin. Mobile: CDBE. Parameter error. Datasheet error. Life cycle error. Image error. Classification error. Other information feedback. Submit successfully. Share LinkedIn.
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CD4027BE PDF Datasheet浏览和下载
CMOS Dual J-K Master-Slave Flip-Flop
CD4027BE Datasheet PDF - Texas Instruments